Apollo 15 Lunar Surface Panorama (AS15-87-11845/47) — NASA. Panorama by Erik van Meijgaarden

Robert D. Schoening

Bob Schoening, BSEE — Electrical Engineer | Software Developer

Retired electrical engineer with deep experience in hardware test development engineering, now building software with Python and AI tools (Claude Code). Open to consulting in software development, test development engineering, and AI-assisted automation.

Engineering Background

Decades of test development engineering across hardware domains including disk drives (IBM), optical/fiber optics (Vitesse-OSD, Harmonic), telecom and networking (Harmonic), embedded systems, PCB design and test, and data storage (Data Domain). Designed production test systems using PXI, GPIB/IEEE-488, I2C, and SCPI instrumentation. Managed a test development engineering department of engineers, programmers, and technicians. Extensive experience with contract manufacturers including Sanmina, Solectron, and Flex.

Software & Programming

Currently developing in Python using Claude Code and VS Code. Built and published a document search application (RDSdoc) on GitHub. Additional experience in C, LabVIEW, TestStand, Assembly, HTML/CSS/JavaScript, PHP, SQL. Comfortable across Linux, Windows, and Mac. Arduino and Raspberry Pi hobbyist.

Technical Writing

Authored manufacturing test procedures and software requirements specifications for third-party development.

Award: IBM "Outstanding Technical Achievement Award" (OTAA)

A corporate award from IBM for conceiving of and developing a software design tool (TRES, an expert system) that determines the best test plan for unpopulated printed circuit boards (PCBs). TRES (Test/Reliability Expert System) saves 1-2 man years per year and shortened the average test development plan cycle time from 6 weeks to a day. This site had over 5000 employees and its primary business was manufacturing PCBs for a wide variety of IBM products. I conceived of the tool and collaborated with two domain experts in test and reliability (Desai, Hartley) who also shared in award. I led the project and wrote all the software.

Patents: (US 5546321 A, US 5519633 A)

For a second software design tool (MIDAS) that interrelates PCB cross-sectional geometries with electrical performance (via algorithms incorporated from a previously developed electrical analysis tool by Chang, Gernhart, Ho), manufacturability, cost, test (via rules and algorithms incorporated from TRES above), quality (IFR, ELF, SPQL), and second-level packaging. MIDAS (Manufacturability-Influenced Design Analysis System) cut design times (depending on complexity) from days/weeks to hours. I conceived of the tool, obtained management buy-in, assembled and led a team of 10 knowledge domain experts (named in patent), and wrote all the software.

Military Service (Honorable Discharge), 1968-1974
University (B.S. Electrical Engineering), 1975-1980

All professional positions were in hardware test development engineering or management:

NEW YORK, VERMONT (1980-1996)

IBM Corporation, Endicott, NY 1980-1993 Computers and circuit boards (PCBs)
IBM -> Loral, Owego, NY 1993-1996 (formerly IBM, now Lockheed) Avionics
IBM Corporation, Burlington, VT, NY 1996-1996 Semiconductors

SILICON VALLEY (1996-2010)

IBM Corporation, San Jose, CA 1996-1999 (site closed) Hard disk drives
Harmonic, Sunnyvale, CA 1999-2000 Video delivery technology
Nohau, Campbell, CA 2000-2001 (out of business) In-Circuit Emulators (ICE)
Vitesse-OSD, San Jose, CA 2002-2003 (acquired) Optical transponders
Force Computers, Fremont, CA 2004-2005 (acquired) Embedded computer blades
Ampro Computers, San Jose, CA 2005-2007 (acquired) Embedded computer boards
Data Domain, Santa Clara, CA 2008-2009 (acquired) Data deduplication equipment

NEW YORK (2010-PRESENT)

BAE Systems, Johnson City, NY, 2010-2011 Defense (Contractor, fly-by-wire system)
Consultant, Endicott, NY, 2011-Present

Please contact me via LinkedIn for a full resume.